Test Reduction Using Plackett-Burman
In order to train the machine learner that is central to MAGEEC, a large data set is required relating energy measurements and compiler optimisation passes. Our benchmarking suite, BEEBS, is comprised of 93 applications (correct at the time of writing), and is continuing to expand. Similarly, our current count of trivially optional optimization passes in GCC (for an AVR platform) is 120. If we consider a full factorial design, whereby we run a test for every possible configuration of compiler passes, for each benchmark, clearly the experiment will be enormous in scope. Therefore, it is in our interest to analyse the effects of each compiler pass on a per architecture basis, in order to determine which have negligible effect on energy consumption. To achieve this, as part of my contribution to the MAGEEC project this Summer, I will be working on implementing a Plackett-Burman design.
