Difference between revisions of "Literature"

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(Machine Learning)
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'''Spatial Based Feature Generation for Machine Learning Based Optimization Compilation.'''
 
'''Spatial Based Feature Generation for Machine Learning Based Optimization Compilation.'''
 
:Malik, A. M. (2010). ''Spatial Based Feature Generation for Machine Learning Based Optimization Compilation.'' 2010 Ninth International Conference on Machine Learning and Applications, 925–930. doi:10.1109/ICMLA.2010.147
 
:Malik, A. M. (2010). ''Spatial Based Feature Generation for Machine Learning Based Optimization Compilation.'' 2010 Ninth International Conference on Machine Learning and Applications, 925–930. doi:10.1109/ICMLA.2010.147
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=Energy Optimisation Theory=
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'''Instruction scheduling based on energy and performance constraints.'''
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:Parikh, A., Kandemir, M., Vijaykrishnan, N., & Irwin, M. J. (2000). ''Instruction scheduling based on energy and performance constraints.'' 2000 Proceedings. IEEE Computer Society Workshop on VLSI (pp. 37–42). IEEE Comput. Soc. doi:10.1109/IWV.2000.844527
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'''Improving Energy Consumption by Compiler Optimization Technique Register Pipelining'''
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:Steinke, S., & Schwarz, R. (n.d.). ''Improving Energy Consumption by Compiler Optimization Technique Register Pipelining.''

Revision as of 14:23, 22 March 2013

This page lists literature and related work that may be relevant to the project.

Machine Learning

MILEPOST

Fursin, G., Kashnikov, Y., Memon, A. W., Chamski, Z., Temam, O., Namolaru, M., Yom-Tov, E., et al. (2011). Milepost GCC: machine learning enabled self-tuning compiler. International Journal of Parallel Programming, 1–31.


Mitigating the compiler optimization phase-ordering problem using machine learning.

Kulkarni, S., & Cavazos, J. (2012). Mitigating the compiler optimization phase-ordering problem using machine learning. Proceedings of the ACM international conference on Object oriented programming systems languages and applications, 1–16. Retrieved from http://dl.acm.org/citation.cfm?id=2384616.2384628


Rapidly Selecting Good Compiler Optimizations using Performance Counters.

Cavazos, J., Fursin, G., Agakov, F., Bonilla, E., O’Boyle, M. F. P., & Temam, O. (2007). Rapidly Selecting Good Compiler Optimizations using Performance Counters. International Symposium on Code Generation and Optimization (CGO’07) (pp. 185–197). IEEE. doi:10.1109/CGO.2007.32


Automatic selection of GCC optimization options using a gene weighted genetic algorithm.

Lin, S., Chang, C., & Lin, N. (2008). Automatic selection of GCC optimization options using a gene weighted genetic algorithm. Computer Systems Architecture Conference, 2008. ACSAC 2008. 13th Asia-Pacific, 1–8. doi:10.1109/APCSAC.2008.4625477


Meta optimization: Improving compiler heuristics with machine learning.

Stephenson, M., & Amarasinghe, S. (2003). Meta optimization: Improving compiler heuristics with machine learning. Proceedings of the ACM SIGPLAN 2003 conference on Programming language design and implementation. Retrieved from http://dl.acm.org/citation.cfm?id=781141


Using Machine Learning to Automate Compiler Optimisation

Thomson, J. D. (2008). Using Machine Learning to Automate Compiler Optimisation.

Feature Selection

MILEPOST Feature list [1]


Spatial Based Feature Generation for Machine Learning Based Optimization Compilation.

Malik, A. M. (2010). Spatial Based Feature Generation for Machine Learning Based Optimization Compilation. 2010 Ninth International Conference on Machine Learning and Applications, 925–930. doi:10.1109/ICMLA.2010.147

Energy Optimisation Theory

Instruction scheduling based on energy and performance constraints.

Parikh, A., Kandemir, M., Vijaykrishnan, N., & Irwin, M. J. (2000). Instruction scheduling based on energy and performance constraints. 2000 Proceedings. IEEE Computer Society Workshop on VLSI (pp. 37–42). IEEE Comput. Soc. doi:10.1109/IWV.2000.844527

Improving Energy Consumption by Compiler Optimization Technique Register Pipelining

Steinke, S., & Schwarz, R. (n.d.). Improving Energy Consumption by Compiler Optimization Technique Register Pipelining.