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Thanks.<br>
<br>
I've focussed on RAM/flash/ALU at the moment, since this is likely
what we will have to cope with when using the compiler, in MAGEEC.
Hopefully the variability that may occur the other areas you list
won't be affected by compiler optimizations too much. However, for
the purposes of completeness I may extend the tests to do EEPROM and
some other peripheral access also.<br>
<br>
Cheers,<br>
James<br>
<br>
<div class="moz-cite-prefix">On 27/07/14 17:56, Alex J Lennon wrote:<br>
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type="cite">
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<br>
Ah OK. Thanks for the explanation. Very interesting work. <br>
<br>
It occurs to me that there may be some interesting results to be
obtained from testing running, say, repeated interrupts, running
timers, access to EEPROM, GPIO reads, ADC sampling and so forth?<br>
<br>
I guess it would depend what you're trying to look at
specifically.<br>
<br>
Thanks again,<br>
<br>
Alex<br>
<br>
<div class="moz-cite-prefix">On 27/07/2014 17:47, James Pallister
wrote:<br>
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<div class="moz-cite-prefix">Ah yes, the flash tests were purely
for read access from different areas of flash, based on the
idea that there may be silicon variation between parts of the
address space.<br>
<br>
It was actually program execution from different areas of
flash, by putting a tight loop in a specific area and
measuring the power. For example (flash1):<br>
<br>
<tt> .balign 2048</tt><tt><br>
</tt><tt> .rept 6 ; Change between 0, 6, 126, and
2046 for flash0, flash1, flash2, and flash3</tt><tt><br>
</tt><tt> nop</tt><tt><br>
</tt><tt> .endr</tt><tt><br>
</tt><tt>loop:</tt><tt><br>
</tt><tt> nop</tt><tt><br>
</tt><tt> inc r16</tt><tt><br>
</tt><tt> cpse r0, r16</tt><tt><br>
</tt><tt> jmp loop</tt><tt><br>
</tt><br>
<br>
The procedure for each test:<br>
1. Invoke the bootloader, and upload program code<br>
2. The program code runs, and toggles a pin to trigger the
energy measurement<br>
3. When the test is finished, the ATMEGA328 toggles the pin
again to stop the measurement<br>
4. Measurement results are downloaded from the energy
measurement board.<br>
<br>
I haven't done any flash writing/erasing tests, but I agree it
would be interesting to do some. I'd expect the power during a
write/erase to be much higher.<br>
<br>
Hope this helps,<br>
James<br>
<br>
On 27/07/14 17:32, Alex J Lennon wrote:<br>
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<div class="moz-cite-prefix">On 27/07/2014 17:27, James
Pallister wrote:<br>
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<div class="moz-cite-prefix">No JTAG - the chips are flashed
with a bootloader, which is only active on chip reset.
Everything is programmed via a USB-to-serial thingy.<br>
<br>
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<br>
Sorry, I don't think I'm understanding fully James. So the
flash area tests are via JTAG? I guess that would mean that
the test is a read only test?<br>
<br>
(I'm just asking because I'm quite interested in power
utilisation during write/erase cycles vs read. If you're not
doing that could I suggest it might be an interesting test?)<br>
<br>
BR. Alex<br>
<br>
<blockquote cite="mid:53D5288E.4090006@bristol.ac.uk"
type="cite">
<div class="moz-cite-prefix"> On 27/07/14 17:25, Steve
Kerrison wrote:<br>
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<blockquote
cite="mid:CANxPWH78iD_Odt_9f+REHOLnPDOA26oGVBzmsY8sNGZ9b9x1cA@mail.gmail.com"
type="cite">
<p dir="ltr">Is JTAG connected during test runs?
Interested to know how much difference that makes,
although it should be constant thus irrelevant.</p>
<div class="gmail_quote">On 27 Jul 2014 17:13, "James
Pallister" <<a moz-do-not-send="true"
href="mailto:James.Pallister@bristol.ac.uk">James.Pallister@bristol.ac.uk</a>>
wrote:<br type="attribution">
<blockquote class="gmail_quote" style="margin:0 0 0
.8ex;border-left:1px #ccc solid;padding-left:1ex">
<div bgcolor="#FFFFFF" text="#000000"> Hi All,<br>
<br>
Some preliminary findings on variations in the
ATMEGA328 chips.<br>
<br>
I've tested 28 chips. For each chip 9 tests were
ran:<br>
<br>
<table border="1" cellpadding="2" cellspacing="2"
width="733" height="58">
<tbody>
<tr>
<td valign="top">flash0<br>
</td>
<td valign="top">Test the area of flash
0x0800-0x0810<br>
</td>
</tr>
<tr>
<td valign="top">flash1<br>
</td>
<td valign="top">Test the area of flash
0x080C-0x081C</td>
</tr>
<tr>
<td valign="top">flash2<br>
</td>
<td valign="top">Test the area of flash
0x08FC-0x090C</td>
</tr>
<tr>
<td valign="top">flash3<br>
</td>
<td valign="top">Test the area of flash
0x0FFC-0x100C</td>
</tr>
<tr>
<td valign="top">ram0<br>
</td>
<td valign="top">Repeatedly access 0x0000 -
0x0020<br>
</td>
</tr>
<tr>
<td valign="top">ram1<br>
</td>
<td valign="top">Repeatedly access 0xF007 -
0xF017<br>
</td>
</tr>
<tr>
<td valign="top">alu<br>
</td>
<td valign="top">Perform combinations of mul,
fmul, inc and dec<br>
</td>
</tr>
<tr>
<td valign="top">nop<br>
</td>
<td valign="top">Lots of nops<br>
</td>
</tr>
<tr>
<td valign="top">branch<br>
</td>
<td valign="top">Repeatedly branch randomly in
low flash<br>
</td>
</tr>
</tbody>
</table>
<br>
Each test was run 8 times, and outliers excluded.
All were run in the same harness, with the same
crystal, resistors, etc.<br>
<br>
Results across each test. These show the
distributions of the measurements taken, where the
distribution consists of the 28 chips.<br>
<img src="cid:part2.01030402.06070103@bristol.ac.uk"
alt=""><br>
<br>
From the first graph: there is a significant
different, even on a day to day basis. I'm not sure
what causes this - I'd expect the power to be lower
at lower temperatures, which we don't see.<br>
<br>
For each chip:<br>
<img src="cid:part3.09010504.04060802@bristol.ac.uk"
alt=""><br>
Mean power for each chip:<br>
<img src="cid:part4.06040608.09030803@bristol.ac.uk"
alt=""><br>
<br>
<br>
The average power changes quite a lot, going from
< 80mW to > 100mW. In almost all cases, the
average power was higher on Saturday - not sure why
this is, the temperature difference was only 3-4
degrees (and I'd expect the temperature to go down
with lower temperature).<br>
<br>
The chips tend to vary as a whole, e.g. rather than
the ALU varying significantly in one part rather
than another. The following graph marks the average
power for each test, divided by test type (different
color/marker combinations) per chip. This should
allow hopefully allow us to do a calibration run
first.<br>
<img src="cid:part5.07040402.04080807@bristol.ac.uk"
alt=""><br>
Legend for the above graph:<br>
<table border="1" cellpadding="2" cellspacing="2"
width="318" height="58">
<tbody>
<tr>
<td valign="top">Blue cross<br>
</td>
<td valign="top">ram1<br>
</td>
</tr>
<tr>
<td valign="top">Red star<br>
</td>
<td valign="top">ram0<br>
</td>
</tr>
<tr>
<td valign="top">Green plus<br>
</td>
<td valign="top">alu<br>
</td>
</tr>
<tr>
<td valign="top">Black plus<br>
</td>
<td valign="top">flash3<br>
</td>
</tr>
<tr>
<td valign="top">Green cross<br>
</td>
<td valign="top">flash2<br>
</td>
</tr>
<tr>
<td valign="top">Blue star<br>
</td>
<td valign="top">flash1<br>
</td>
</tr>
<tr>
<td valign="top">Red plus<br>
</td>
<td valign="top">flash0<br>
</td>
</tr>
<tr>
<td valign="top">Black star<br>
</td>
<td valign="top">nop<br>
</td>
</tr>
</tbody>
</table>
<br>
<br>
Any thoughts / ideas for more tests are welcome.<br>
<br>
<br>
James<br>
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