#mageec Log for 2013-07-29

--- Log opened Mon Jul 29 00:00:19 2013
@jeremybennettI'm just working on getting James's benchmarks running on an AVR system.18:18
@jeremybennettnot sure where the problem is. I'm actually working with real HW model, so I only have 4K of RAM. The behavior I see is that a RET takes me to the reset vector.18:31
@jeremybennettAh - yes found the problem:    text    data     bss     dec     hex filename18:32
@jeremybennett   9610    4192       0   13802    35ea blowfish18:32
@jeremybennetttry that again18:32
@jeremybennett   text    data     bss     dec     hex filename18:32
@jeremybennett   9610    4192       0   13802    35ea blowfish18:32
@jeremybennettSo it doesn't fit in 4K of RAM.18:32
@jeremybennettjamespallister: AWhetter: fdct.c makes assumptions about type sizes:18:35
@jeremybennettfdct.c: In function 'fdct':18:35
@jeremybennettfdct.c:183:5: warning: right shift count >= width of type [enabled by default]18:35
@jeremybennett     block[2*lx] = (z1 + (tmp13 * constant)) >> (CONST_BITS+PASS1_BITS+3);18:35
@jeremybennett     ^18:35
@jeremybennettfdct.c:185:5: warning: right shift count >= width of type [enabled by default]18:35
@jeremybennett     block[6*lx] = (z1 + (tmp12 * constant)) >> (CONST_BITS+PASS1_BITS+3);18:35
@jeremybennett     ^18:35
@jeremybennettfdct.c:219:5: warning: right shift count >= width of type [enabled by default]18:35
@jeremybennett     block[7*lx] = (tmp4 + z1 + z3) >> (CONST_BITS+PASS1_BITS+3);18:35
@jeremybennett     ^18:35
@jeremybennettfdct.c:220:5: warning: right shift count >= width of type [enabled by default]18:35
@jeremybennett     block[5*lx] = (tmp5 + z2 + z4) >> (CONST_BITS+PASS1_BITS+3);18:35
@jeremybennett     ^18:35
@jeremybennettfdct.c:221:5: warning: right shift count >= width of type [enabled by default]18:35
@jeremybennett     block[3*lx] = (tmp6 + z2 + z3) >> (CONST_BITS+PASS1_BITS+3);18:35
@jeremybennett     ^18:35
@jeremybennettfdct.c:222:5: warning: right shift count >= width of type [enabled by default]18:35
@jeremybennett     block[lx] =  (tmp7 + z1 + z4) >> (CONST_BITS+PASS1_BITS+3);18:35
@jeremybennett     ^18:35
jamespallisterAhh I see18:36
jamespallisterIf a shift is too large does it cause a reset?18:36
@jeremybennettNo - that was a completely different problem. In this case it is just a compiler warning, and for now the compiler lets it through.18:46
@jeremybennettBut the code won't work.18:46
@jeremybennettThere is an implicit assumption that block is an array of 32-bit entities.18:47
@jeremybennettProbably should be declared as type uint32_t rather than int18:47
jamespallisterYes - I don't think many of the benchmarks were written with 8bit processors in mind18:48
@jeremybennettI now have all but 2 of your benchmarks compiled and running on ATmega128 with 4K RAM.18:48
@jeremybennettblowfish is too big and fdct has the problem identified above. So if you can fix fdct, then I can try running it as well.18:49
--- Log closed Tue Jul 30 00:00:25 2013

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